Go to the documentation of this file.
01 1 Copyright (c) 2006, 2007, 2008 Eric B. Weddington
022Copyright (c) 2011 Frédéric Nadeau
033All rights reserved.
044
055Redistribution and use in source and binary forms, with or without
066modification, are permitted provided that the following conditions are met:
077
088* Redistributions of source code must retain the above copyright
099notice, this list of conditions and the following disclaimer.
1010* Redistributions in binary form must reproduce the above copyright
1111notice, this list of conditions and the following disclaimer in
1212the documentation and/or other materials provided with the
1313distribution.
1414* Neither the name of the copyright holders nor the names of
1515contributors may be used to endorse or promote products derived
1616from this software without specific prior written permission.
1717
1818THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1919AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2020IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2121ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
2222LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2323CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2424SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2525INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2626CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2727ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2828POSSIBILITY OF SUCH DAMAGE. */
2929
3030/* $Id: power.h 2503 2016-02-07 22:59:47Z joerg_wunsch $ */
3131
3232#ifndef _AVR_POWER_H_
3333#define _AVR_POWER_H_ 1
3434
3535#include <avr/io.h>
3636#include <stdint.h>
3737
3838
3939/** \file */
4040/** \defgroup avr_power <avr/power.h>: Power Reduction Management
4141
4242\code #include <avr/power.h>\endcode
4343
4444 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
4545 allow you to reduce power consumption by disabling or enabling various on-board
4646 peripherals as needed. Some devices have the XTAL Divide Control Register
4747(XDIV) which offer similar functionality as System Clock Prescale
4848 Register (CLKPR).
4949
5050 There are many macros in this header file that provide an easy interface
5151 to enable or disable on-board peripherals to reduce power. See the table below.
5252
5353\note Not all AVR devices have a Power Reduction Register (for example
5454 the ATmega8). On those devices without a Power Reduction Register, the
5555 power reduction macros are not available..
5656
5757\note Not all AVR devices contain the same peripherals (for example, the LCD
5858 interface), or they will be named differently (for example, USART and
5959 USART0). Please consult your device's datasheet, or the header file, to
6060 find out which macros are applicable to your device.
6161
6262\note For device using the XTAL Divide Control Register (XDIV), when prescaler
6363 is used, Timer/Counter0 can only be used in asynchronous mode. Keep in mind
6464 that Timer/Counter0 source shall be less than ¼th of peripheral clock.
6565 Therefore, when using a typical 32.768 kHz crystal, one shall not scale
6666 the clock below 131.072 kHz.
6767
6868*/
6969
7070
7171/** \addtogroup avr_power
7272
7373\anchor avr_powermacros
7474<small>
7575<center>
7676<table border="3">
7777<tr>
7878<td width="10%"><strong>Power Macro</strong></td>
7979<td width="15%"><strong>Description</strong></td>
8080</tr>
8181
8282<tr>
8383<td>power_aca_disable()</td>
8484<td>Disable the Analog Comparator on PortA.</td>
8585</tr>
8686
8787<tr>
8888<td>power_aca_enable()</td>
8989<td>Enable the Analog Comparator on PortA.</td>
9090</tr>
9191
9292<tr>
9393<td>power_adc_enable()</td>
9494<td>Enable the Analog to Digital Converter module.</td>
9595</tr>
9696
9797<tr>
9898<td>power_adc_disable()</td>
9999<td>Disable the Analog to Digital Converter module.</td>
100100</tr>
101101
102102<tr>
103103<td>power_adca_disable()</td>
104104<td>Disable the Analog to Digital Converter module on PortA</td>
105105</tr>
106106
107107<tr>
108108<td>power_adca_enable()</td>
109109<td>Enable the Analog to Digital Converter module on PortA</td>
110110</tr>
111111
112112<tr>
113113<td>power_evsys_disable()</td>
114114<td>Disable the EVSYS module</td>
115115</tr>
116116
117117<tr>
118118<td>power_evsys_enable()</td>
119119<td>Enable the EVSYS module</td>
120120</tr>
121121
122122<tr>
123123<td>power_hiresc_disable()</td>
124124<td>Disable the HIRES module on PortC</td>
125125</tr>
126126
127127<tr>
128128<td>power_hiresc_enable()</td>
129129<td>Enable the HIRES module on PortC</td>
130130</tr>
131131
132132<tr>
133133<td>power_lcd_enable()</td>
134134<td>Enable the LCD module.</td>
135135</tr>
136136
137137<tr>
138138<td>power_lcd_disable().</td>
139139<td>Disable the LCD module.</td>
140140</tr>
141141
142142<tr>
143143<td>power_pga_enable()</td>
144144<td>Enable the Programmable Gain Amplifier module.</td>
145145</tr>
146146
147147<tr>
148148<td>power_pga_disable()</td>
149149<td>Disable the Programmable Gain Amplifier module.</td>
150150</tr>
151151152152<tr>
153153<td>power_pscr_enable()</td>
154154<td>Enable the Reduced Power Stage Controller module.</td>
155155</tr>
156156
157157<tr>
158158<td>power_pscr_disable()</td>
159159<td>Disable the Reduced Power Stage Controller module.</td>
160160</tr>
161161
162162<tr>
163163<td>power_psc0_enable()</td>
164164<td>Enable the Power Stage Controller 0 module.</td>
165165</tr>
166166
167167<tr>
168168<td>power_psc0_disable()</td>
169169<td>Disable the Power Stage Controller 0 module.</td>
170170</tr>
171171
172172<tr>
173173<td>power_psc1_enable()</td>
174174<td>Enable the Power Stage Controller 1 module.</td>
175175</tr>
176176
177177<tr>
178178<td>power_psc1_disable()</td>
179179<td>Disable the Power Stage Controller 1 module.</td>
180180</tr>
181181
182182<tr>
183183<td>power_psc2_enable()</td>
184184<td>Enable the Power Stage Controller 2 module.</td>
185185</tr>
186186
187187<tr>
188188<td>power_psc2_disable()</td>
189189<td>Disable the Power Stage Controller 2 module.</td>
190190</tr>
191191
192192<tr>
193193<td>power_ram0_enable()</td>
194194<td>Enable the SRAM block 0 .</td>
195195</tr>
196196
197197<tr>
198198<td>power_ram0_disable()</td>
199199<td>Disable the SRAM block 0. </td>
200200</tr>
201201
202202<tr>
203203<td>power_ram1_enable()</td>
204204<td>Enable the SRAM block 1 .</td>
205205</tr>
206206
207207<tr>
208208<td>power_ram1_disable()</td>
209209<td>Disable the SRAM block 1. </td>
210210</tr>
211211
212212<tr>
213213<td>power_ram2_enable()</td>
214214<td>Enable the SRAM block 2 .</td>
215215</tr>
216216
217217<tr>
218218<td>power_ram2_disable()</td>
219219<td>Disable the SRAM block 2. </td>
220220</tr>
221221
222222<tr>
223223<td>power_ram3_enable()</td>
224224<td>Enable the SRAM block 3 .</td>
225225</tr>
226226
227227<tr>
228228<td>power_ram3_disable()</td>
229229<td>Disable the SRAM block 3. </td>
230230</tr>
231231
232232<tr>
233233<td>power_rtc_disable()</td>
234234<td>Disable the RTC module</td>
235235</tr>
236236
237237<tr>
238238<td>power_rtc_enable()</td>
239239<td>Enable the RTC module</td>
240240</tr>
241241
242242<tr>
243243<td>power_spi_enable()</td>
244244<td>Enable the Serial Peripheral Interface module.</td>
245245</tr>
246246
247247<tr>
248248<td>power_spi_disable()</td>
249249<td>Disable the Serial Peripheral Interface module.</td>
250250</tr>
251251
252252<tr>
253253<td>power_spic_disable()</td>
254254<td>Disable the SPI module on PortC</td>
255255</tr>
256256
257257<tr>
258258<td>power_spic_enable()</td>
259259<td>Enable the SPI module on PortC</td>
260260</tr>
261261
262262<tr>
263263<td>power_spid_disable()</td>
264264<td>Disable the SPI module on PortD</td>
265265</tr>
266266
267267<tr>
268268<td>power_spid_enable()</td>
269269<td>Enable the SPI module on PortD</td>
270270</tr>
271271
272272<tr>
273273<td>power_tc0c_disable()</td>
274274<td>Disable the TC0 module on PortC</td>
275275</tr>
276276
277277<tr>
278278<td>power_tc0c_enable()</td>
279279<td>Enable the TC0 module on PortC</td>
280280</tr>
281281
282282<tr>
283283<td>power_tc0d_disable()</td>
284284<td>Disable the TC0 module on PortD</td>
285285</tr>
286286
287287<tr>
288288<td>power_tc0d_enable()</td>
289289<td>Enable the TC0 module on PortD</td>
290290</tr>
291291
292292<tr>
293293<td>power_tc0e_disable()</td>
294294<td>Disable the TC0 module on PortE</td>
295295</tr>
296296
297297<tr>
298298<td>power_tc0e_enable()</td>
299299<td>Enable the TC0 module on PortE</td>
300300</tr>
301301
302302<tr>
303303<td>power_tc0f_disable()</td>
304304<td>Disable the TC0 module on PortF</td>
305305</tr>
306306
307307<tr>
308308<td>power_tc0f_enable()</td>
309309<td>Enable the TC0 module on PortF</td>
310310</tr>
311311
312312<tr>
313313<td>power_tc1c_disable()</td>
314314<td>Disable the TC1 module on PortC</td>
315315</tr>
316316
317317<tr>
318318<td>power_tc1c_enable()</td>
319319<td>Enable the TC1 module on PortC</td>
320320</tr>
321321
322322<tr>
323323<td>power_twic_disable()</td>
324324<td>Disable the Two Wire Interface module on PortC</td>
325325</tr>
326326
327327<tr>
328328<td>power_twic_enable()</td>
329329<td>Enable the Two Wire Interface module on PortC</td>
330330</tr>
331331
332332<tr>
333333<td>power_twie_disable()</td>
334334<td>Disable the Two Wire Interface module on PortE</td>
335335</tr>
336336
337337<tr>
338338<td>power_twie_enable()</td>
339339<td>Enable the Two Wire Interface module on PortE</td>
340340</tr>
341341
342342<tr>
343343<td>power_timer0_enable()</td>
344344<td>Enable the Timer 0 module.</td>
345345</tr>
346346
347347<tr>
348348<td>power_timer0_disable()</td>
349349<td>Disable the Timer 0 module.</td>
350350</tr>
351351
352352<tr>
353353<td>power_timer1_enable()</td>
354354<td>Enable the Timer 1 module.</td>
355355</tr>
356356
357357<tr>
358358<td>power_timer1_disable()</td>
359359<td>Disable the Timer 1 module.</td>
360360</tr>
361361
362362<tr>
363363<td>power_timer2_enable()</td>
364364<td>Enable the Timer 2 module.</td>
365365</tr>
366366
367367<tr>
368368<td>power_timer2_disable()</td>
369369<td>Disable the Timer 2 module.</td>
370370</tr>
371371
372372<tr>
373373<td>power_timer3_enable()</td>
374374<td>Enable the Timer 3 module.</td>
375375</tr>
376376
377377<tr>
378378<td>power_timer3_disable()</td>
379379<td>Disable the Timer 3 module.</td>
380380</tr>
381381
382382<tr>
383383<td>power_timer4_enable()</td>
384384<td>Enable the Timer 4 module.</td>
385385</tr>
386386
387387<tr>
388388<td>power_timer4_disable()</td>
389389<td>Disable the Timer 4 module.</td>
390390</tr>
391391
392392<tr>
393393<td>power_timer5_enable()</td>
394394<td>Enable the Timer 5 module.</td>
395395</tr>
396396
397397<tr>
398398<td>power_timer5_disable()</td>
399399<td>Disable the Timer 5 module.</td>
400400</tr>
401401
402402<tr>
403403<td>power_twi_enable()</td>
404404<td>Enable the Two Wire Interface module.</td>
405405</tr>
406406
407407<tr>
408408<td>power_twi_disable()</td>
409409<td>Disable the Two Wire Interface module.</td>
410410</tr>
411411
412412<tr>
413413<td>power_usart_enable()</td>
414414<td>Enable the USART module.</td>
415415</tr>
416416
417417<tr>
418418<td>power_usart_disable()</td>
419419<td>Disable the USART module.</td>
420420</tr>
421421
422422<tr>
423423<td>power_usart0_enable()</td>
424424<td>Enable the USART 0 module.</td>
425425</tr>
426426
427427<tr>
428428<td>power_usart0_disable()</td>
429429<td>Disable the USART 0 module.</td>
430430</tr>
431431
432432<tr>
433433<td>power_usart1_enable()</td>
434434<td>Enable the USART 1 module.</td>
435435</tr>
436436
437437<tr>
438438<td>power_usart1_disable()</td>
439439<td>Disable the USART 1 module.</td>
440440</tr>
441441
442442<tr>
443443<td>power_usart2_enable()</td>
444444<td>Enable the USART 2 module.</td>
445445</tr>
446446
447447<tr>
448448<td>power_usart2_disable()</td>
449449<td>Disable the USART 2 module.</td>
450450</tr>
451451
452452<tr>
453453<td>power_usart3_enable()</td>
454454<td>Enable the USART 3 module.</td>
455455</tr>
456456
457457<tr>
458458<td>power_usart3_disable()</td>
459459<td>Disable the USART 3 module.</td>
460460</tr>
461461
462462<tr>
463463<td>power_usartc0_disable()</td>
464464<td> Disable the USART0 module on PortC</td>
465465</tr>
466466
467467<tr>
468468<td>power_usartc0_enable()</td>
469469<td> Enable the USART0 module on PortC</td>
470470</tr>
471471
472472<tr>
473473<td>power_usartd0_disable()</td>
474474<td> Disable the USART0 module on PortD</td>
475475</tr>
476476
477477<tr>
478478<td>power_usartd0_enable()</td>
479479<td> Enable the USART0 module on PortD</td>
480480</tr>
481481
482482<tr>
483483<td>power_usarte0_disable()</td>
484484<td> Disable the USART0 module on PortE</td>
485485</tr>
486486
487487<tr>
488488<td>power_usarte0_enable()</td>
489489<td> Enable the USART0 module on PortE</td>
490490</tr>
491491
492492<tr>
493493<td>power_usartf0_disable()</td>
494494<td> Disable the USART0 module on PortF</td>
495495</tr>
496496
497497<tr>
498498<td>power_usartf0_enable()</td>
499499<td> Enable the USART0 module on PortF</td>
500500</tr>
501501
502502<tr>
503503<td>power_usb_enable()</td>
504504<td>Enable the USB module.</td>
505505</tr>
506506
507507<tr>
508508<td>power_usb_disable()</td>
509509<td>Disable the USB module.</td>
510510</tr>
511511
512512<tr>
513513<td>power_usi_enable()</td>
514514<td>Enable the Universal Serial Interface module.</td>
515515</tr>
516516
517517<tr>
518518<td>power_usi_disable()</td>
519519<td>Disable the Universal Serial Interface module.</td>
520520</tr>
521521
522522<tr>
523523<td>power_vadc_enable()</td>
524524<td>Enable the Voltage ADC module.</td>
525525</tr>
526526
527527<tr>
528528<td>power_vadc_disable()</td>
529529<td>Disable the Voltage ADC module.</td>
530530</tr>
531531
532532<tr>
533533<td>power_all_enable()</td>
534534<td>Enable all modules.</td>
535535</tr>
536536
537537<tr>
538538<td>power_all_disable()</td>
539539<td>Disable all modules.</td>
540540</tr>
541541</table>
542542</center>
543543</small>
544544
545545@} */
546546
547547#if defined(__AVR_HAVE_PRR_PRADC)
548548#define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
549549#define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
550550#endif
551551
552552#if defined(__AVR_HAVE_PRR_PRCAN)
553553#define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
554554#define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
555555#endif
556556
557557#if defined(__AVR_HAVE_PRR_PRLCD)
558558#define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
559559#define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
560560#endif
561561
562562#if defined(__AVR_HAVE_PRR_PRLIN)
563563#define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
564564#define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
565565#endif
566566
567567#if defined(__AVR_HAVE_PRR_PRPSC)
568568#define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
569569#define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
570570#endif
571571
572572#if defined(__AVR_HAVE_PRR_PRPSC0)
573573#define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
574574#define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
575575#endif
576576
577577#if defined(__AVR_HAVE_PRR_PRPSC1)
578578#define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
579579#define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
580580#endif
581581
582582#if defined(__AVR_HAVE_PRR_PRPSC2)
583583#define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
584584#define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
585585#endif
586586
587587#if defined(__AVR_HAVE_PRR_PRSCR)
588588#define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
589589#define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
590590#endif
591591
592592#if defined(__AVR_HAVE_PRR_PRSPI)
593593#define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
594594#define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
595595#endif
596596
597597#if defined(__AVR_HAVE_PRR_PRTIM0)
598598#define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
599599#define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
600600#endif
601601
602602#if defined(__AVR_HAVE_PRR_PRTIM1)
603603#define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
604604#define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
605605#endif
606606
607607#if defined(__AVR_HAVE_PRR_PRTIM2)
608608#define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
609609#define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
610610#endif
611611
612612#if defined(__AVR_HAVE_PRR_PRTWI)
613613#define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
614614#define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
615615#endif
616616
617617#if defined(__AVR_HAVE_PRR_PRUSART)
618618#define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
619619#define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
620620#endif
621621
622622#if defined(__AVR_HAVE_PRR_PRUSART0)
623623#define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
624624#define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
625625#endif
626626
627627#if defined(__AVR_HAVE_PRR_PRUSART1)
628628#define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
629629#define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
630630#endif
631631
632632#if defined(__AVR_HAVE_PRR_PRUSI)
633633#define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
634634#define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
635635#endif
636636
637637#if defined(__AVR_HAVE_PRR0_PRADC)
638638#define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
639639#define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
640640#endif
641641
642642#if defined(__AVR_HAVE_PRR0_PRC0)
643643#define power_clock_output_enable() (PRR0 &= (uint8_t)~(1 << PRCO))
644644#define power_clock_output_disable() (PRR0 |= (uint8_t)(1 << PRCO))
645645#endif
646646
647647#if defined(__AVR_HAVE_PRR0_PRCRC)
648648#define power_crc_enable() (PRR0 &= (uint8_t)~(1 << PRCRC))
649649#define power_crc_disable() (PRR0 |= (uint8_t)(1 << PRCRC))
650650#endif
651651
652652#if defined(__AVR_HAVE_PRR0_PRCU)
653653#define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
654654#define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
655655#endif
656656
657657#if defined(__AVR_HAVE_PRR0_PRDS)
658658#define power_irdriver_enable() (PRR0 &= (uint8_t)~(1 << PRDS))
659659#define power_irdriver_disable() (PRR0 |= (uint8_t)(1 << PRDS))
660660#endif
661661
662662#if defined(__AVR_HAVE_PRR0_PRLFR)
663663#define power_lfreceiver_enable() (PRR0 &= (uint8_t)~(1 << PRLFR))
664664#define power_lfreceiver_disable() (PRR0 |= (uint8_t)(1 << PRLFR))
665665#endif
666666
667667#if defined(__AVR_HAVE_PRR0_PRLIN)
668668#define power_lin_enable() (PRR0 &= (uint8_t)~(1 << PRLIN))
669669#define power_lin_disable() (PRR0 |= (uint8_t)(1 << PRLIN))
670670#endif
671671
672672#if defined(__AVR_HAVE_PRR0_PRPGA)
673673#define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
674674#define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
675675#endif
676676
677677#if defined(__AVR_HAVE_PRR0_PRRXDC)
678678#define power_receive_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRRXDC))
679679#define power_receive_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRRXDC))
680680#endif
681681
682682#if defined(__AVR_HAVE_PRR0_PRSPI)
683683#define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
684684#define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
685685#endif
686686
687687#if defined(__AVR_HAVE_PRR0_PRT0)
688688#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRT0))
689689#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRT0))
690690#endif
691691
692692#if defined(__AVR_HAVE_PRR0_PRTIM0)
693693#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
694694#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
695695#endif
696696
697697#if defined(__AVR_HAVE_PRR0_PRT1)
698698#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRT1))
699699#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRT1))
700700#endif
701701
702702#if defined(__AVR_HAVE_PRR0_PRTIM1)
703703#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
704704#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
705705#endif
706706
707707#if defined(__AVR_HAVE_PRR0_PRT2)
708708#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRT2))
709709#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRT2))
710710#endif
711711
712712#if defined(__AVR_HAVE_PRR0_PRTIM2)
713713#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
714714#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
715715#endif
716716
717717#if defined(__AVR_HAVE_PRR0_PRT3)
718718#define power_timer3_enable() (PRR0 &= (uint8_t)~(1 << PRT3))
719719#define power_timer3_disable() (PRR0 |= (uint8_t)(1 << PRT3))
720720#endif
721721
722722#if defined(__AVR_HAVE_PRR0_PRTM)
723723#define power_timermodulator_enable() (PRR0 &= (uint8_t)~(1 << PRTM))
724724#define power_timermodulator_disable() (PRR0 |= (uint8_t)(1 << PRTM))
725725#endif
726726
727727#if defined(__AVR_HAVE_PRR0_PRTWI)
728728#define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
729729#define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
730730#endif
731731
732732#if defined(__AVR_HAVE_PRR0_PRTXDC)
733733#define power_transmit_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRTXDC))
734734#define power_transmit_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRTXDC))
735735#endif
736736
737737#if defined(__AVR_HAVE_PRR0_PRUSART0)
738738#define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
739739#define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
740740#endif
741741
742742#if defined(__AVR_HAVE_PRR0_PRUSART1)
743743#define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
744744#define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
745745#endif
746746
747747#if defined(__AVR_HAVE_PRR0_PRVADC)
748748#define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
749749#define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
750750#endif
751751
752752#if defined(__AVR_HAVE_PRR0_PRVM)
753753#define power_voltage_monitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
754754#define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
755755#endif
756756
757757#if defined(__AVR_HAVE_PRR0_PRVRM)
758758#define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
759759#define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
760760#endif
761761
762762#if defined(__AVR_HAVE_PRR1_PRAES)
763763#define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
764764#define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
765765#endif
766766
767767#if defined(__AVR_HAVE_PRR1_PRCI)
768768#define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
769769#define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
770770#endif
771771
772772#if defined(__AVR_HAVE_PRR1_PRHSSPI)
773773#define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
774774#define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
775775#endif
776776
777777#if defined(__AVR_HAVE_PRR1_PRKB)
778778#define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
779779#define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
780780#endif
781781
782782#if defined(__AVR_HAVE_PRR1_PRLFR)
783783#define power_lfreceiver_enable() (PRR1 &= (uint8_t)~(1 << PRLFR))
784784#define power_lfreceiver_disable() (PRR1 |= (uint8_t)(1 << PRLFR))
785785#endif
786786
787787#if defined(__AVR_HAVE_PRR1_PRSCI)
788788#define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
789789#define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
790790#endif
791791
792792#if defined(__AVR_HAVE_PRR1_PRT1)
793793#define power_timer1_enable() (PRR1 &= (uint8_t)~(1 << PRT1))
794794#define power_timer1_disable() (PRR1 |= (uint8_t)(1 << PRT1))
795795#endif
796796
797797#if defined(__AVR_HAVE_PRR1_PRT2)
798798#define power_timer2_enable() (PRR1 &= (uint8_t)~(1 << PRT2))
799799#define power_timer2_disable() (PRR1 |= (uint8_t)(1 << PRT2))
800800#endif
801801
802802#if defined(__AVR_HAVE_PRR1_PRT3)
803803#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRT3))
804804#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRT3))
805805#endif
806806
807807#if defined(__AVR_HAVE_PRR1_PRT4)
808808#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRT4))
809809#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRT4))
810810#endif
811811
812812#if defined(__AVR_HAVE_PRR1_PRT5)
813813#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRT5))
814814#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRT5))
815815#endif
816816
817817#if defined(__AVR_HAVE_PRR1_PRTIM3)
818818#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
819819#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
820820#endif
821821
822822#if defined(__AVR_HAVE_PRR1_PRTIM4)
823823#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
824824#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
825825#endif
826826
827827#if defined(__AVR_HAVE_PRR1_PRTIM5)
828828#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
829829#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
830830#endif
831831
832832#if defined(__AVR_HAVE_PRR1_PRTRX24)
833833#define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
834834#define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
835835#endif
836836
837837#if defined(__AVR_HAVE_PRR1_PRUSART1)
838838#define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
839839#define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
840840#endif
841841
842842#if defined(__AVR_HAVE_PRR1_PRUSART2)
843843#define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
844844#define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
845845#endif
846846
847847#if defined(__AVR_HAVE_PRR1_PRUSB)
848848#define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
849849#define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
850850#endif
851851
852852#if defined(__AVR_HAVE_PRR1_PRUSBH)
853853#define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
854854#define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
855855#endif
856856
857857#if defined(__AVR_HAVE_PRR2_PRDF)
858858#define power_data_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRDF))
859859#define power_data_fifo_disable() (PRR2 |= (uint8_t)(1 << PRDF))
860860#endif
861861
862862#if defined(__AVR_HAVE_PRR2_PRIDS)
863863#define power_id_scan_enable() (PRR2 &= (uint8_t)~(1 << PRIDS))
864864#define power_id_scan_disable() (PRR2 |= (uint8_t)(1 << PRIDS))
865865#endif
866866
867867#if defined(__AVR_HAVE_PRR2_PRRAM0)
868868#define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
869869#define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
870870#endif
871871
872872#if defined(__AVR_HAVE_PRR2_PRRAM1)
873873#define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
874874#define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
875875#endif
876876
877877#if defined(__AVR_HAVE_PRR2_PRRAM2)
878878#define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
879879#define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
880880#endif
881881
882882#if defined(__AVR_HAVE_PRR2_PRRAM3)
883883#define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
884884#define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
885885#endif
886886
887887#if defined(__AVR_HAVE_PRR2_PRRS)
888888#define power_rssi_buffer_enable() (PRR2 &= (uint8_t)~(1 << PRRS))
889889#define power_rssi_buffer_disable() (PRR2 |= (uint8_t)(1 << PRRS))
890890#endif
891891
892892#if defined(__AVR_HAVE_PRR2_PRSF)
893893#define power_preamble_rssi_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRSF))
894894#define power_preamble_rssi_fifo_disable() (PRR2 |= (uint8_t)(1 << PRSF))
895895#endif
896896
897897#if defined(__AVR_HAVE_PRR2_PRSSM)
898898#define power_sequencer_state_machine_enable() (PRR2 &= (uint8_t)~(1 << PRSSM))
899899#define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
900900#endif
901901
902902#if defined(__AVR_HAVE_PRR2_PRTM)
903903#define power_tx_modulator_enable() (PRR2 &= (uint8_t)~(1 << PRTM))
904904#define power_tx_modulator_disable() (PRR2 |= (uint8_t)(1 << PRTM))
905905#endif
906906
907907#if defined(__AVR_HAVE_PRR2_PRXA)
908908#define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
909909#define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
910910#endif
911911
912912#if defined(__AVR_HAVE_PRR2_PRXB)
913913#define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
914914#define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
915915#endif
916916
917917#if defined(__AVR_HAVE_PRGEN_AES)
918918#define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
919919#define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
920920#endif
921921
922922#if defined(__AVR_HAVE_PRGEN_DMA)
923923#define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
924924#define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
925925#endif
926926
927927#if defined(__AVR_HAVE_PRGEN_EBI)
928928#define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
929929#define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
930930#endif
931931
932932#if defined(__AVR_HAVE_PRGEN_EDMA)
933933#define power_edma_enable() (PR_PRGEN &= (uint8_t)~(PR_EDMA_bm))
934934#define power_edma_disable() (PR_PRGEN |= (uint8_t)PR_EDMA_bm)
935935#endif
936936
937937#if defined(__AVR_HAVE_PRGEN_EVSYS)
938938#define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
939939#define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
940940#endif
941941
942942#if defined(__AVR_HAVE_PRGEN_LCD)
943943#define power_lcd_enable() (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
944944#define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
945945#endif
946946
947947#if defined(__AVR_HAVE_PRGEN_RTC)
948948#define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
949949#define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
950950#endif
951951
952952#if defined(__AVR_HAVE_PRGEN_USB)
953953#define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
954954#define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
955955#endif
956956
957957#if defined(__AVR_HAVE_PRGEN_XCL)
958958#define power_xcl_enable() (PR_PRGEN &= (uint8_t)~(PR_XCL_bm))
959959#define power_xcl_disable() (PR_PRGEN |= (uint8_t)PR_XCL_bm)
960960#endif
961961
962962#if defined(__AVR_HAVE_PRPA_AC)
963963#define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
964964#define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
965965#endif
966966
967967#if defined(__AVR_HAVE_PRPA_ADC)
968968#define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
969969#define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
970970#endif
971971
972972#if defined(__AVR_HAVE_PRPA_DAC)
973973#define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
974974#define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
975975#endif
976976
977977#if defined(__AVR_HAVE_PRPB_AC)
978978#define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
979979#define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
980980#endif
981981
982982#if defined(__AVR_HAVE_PRPB_ADC)
983983#define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
984984#define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
985985#endif
986986
987987#if defined(__AVR_HAVE_PRPB_DAC)
988988#define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
989989#define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
990990#endif
991991
992992#if defined(__AVR_HAVE_PRPC_HIRES)
993993#define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
994994#define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
995995#endif
996996
997997#if defined(__AVR_HAVE_PRPC_SPI)
998998#define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
999999#define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
static __inline void
1148
__attribute__ ((__always_inline__))
uint8_t)~(__AVR_HAVE_PRR);
uint8_t)~(__AVR_HAVE_PRR0);
uint8_t)~(__AVR_HAVE_PRR1);
uint8_t)~(__AVR_HAVE_PRR2);
uint8_t)~(__AVR_HAVE_PRGEN);
uint8_t)~(__AVR_HAVE_PRPA);
uint8_t)~(__AVR_HAVE_PRPB);
uint8_t)~(__AVR_HAVE_PRPC);
uint8_t)~(__AVR_HAVE_PRPD);
uint8_t)~(__AVR_HAVE_PRPE);
uint8_t)~(__AVR_HAVE_PRPF);
static __inline void
__attribute__ ((__always_inline__))
uint8_t)(__AVR_HAVE_PRR);
uint8_t)(__AVR_HAVE_PRR0);
uint8_t)(__AVR_HAVE_PRR1);
uint8_t)(__AVR_HAVE_PRR2);
uint8_t)(__AVR_HAVE_PRGEN);
uint8_t)(__AVR_HAVE_PRPA);
uint8_t)(__AVR_HAVE_PRPB);
uint8_t)(__AVR_HAVE_PRPC);
uint8_t)(__AVR_HAVE_PRPD);
uint8_t)(__AVR_HAVE_PRPE);
uint8_t)(__AVR_HAVE_PRPF);
typedef enum
static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1451
void clock_prescale_set(clock_div_t __x)
uint8_t __tmp = _BV(CLKPCE);
1476#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void clock_prescale_set(clock_div_t __x)
uint8_t __tmp = _BV(CLKPCE);
typedef enum
static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void system_clock_prescale_set(clock_div_t __x)
uint8_t __tmp = _BV(CLKPCE);
__attribute__((__always_inline__));
void timer_clock_prescale_set(timer_clock_div_t __x)
uint8_t __t;
_BV(CLKPCE)),
typedef enum
static __inline__ void system_clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void system_clock_prescale_set(clock_div_t __x)
uint8_t __t;
_BV(CLPCE),
__attribute__((__always_inline__));
void timer_clock_prescale_set(timer_clock_div_t __x)
uint8_t __t;
_BV(CLPCE)),
static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void clock_prescale_set(clock_div_t __x)
uint8_t __tmp = _BV(CLKPCE);
clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void clock_prescale_set(clock_div_t __x)
uint8_t __tmp = 0;
static __inline__ clock_div_t clock_prescale_get(void) __attribute__((__always_inline__));
clock_prescale_get(void)
bit_is_clear(XDIV, XDIVEN))
static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
void clock_prescale_set(clock_div_t __x)
uint8_t __tmp = 0xD8;
clock_prescale_get
#define clock_prescale_get()
Definition: power.h:1476
io.h
__attribute__
static __inline void __attribute__((__always_inline__)) __power_all_enable()
Definition: power.h:1148
bit_is_clear
#define bit_is_clear(sfr, bit)
Definition: sfr_defs.h:245
uint8_t
unsigned char uint8_t
Definition: stdint.h:83
clock_prescale_set
void clock_prescale_set(clock_div_t __x)
Definition: power.h:1451
_BV
#define _BV(bit)
Definition: sfr_defs.h:208
stdint.h
