Next: VAX-operands, Previous: VAX-opcodes, Up: Vax-Dependent
Certain pseudo opcodes are permitted. They are for branch instructions. They expand to the shortest branch instruction that reaches the target. Generally these mnemonics are made by substituting j for b at the start of a DEC mnemonic. This feature is included both for compatibility and to help compilers. If you do not need this feature, avoid these opcodes. Here are the mnemonics, and the code they can expand into.
jbsb
Jsb is already an instruction mnemonic, so we chose jbsb.
(byte displacement)
bsbb ...
jbr
jr
Unconditional branch.
(byte displacement)
brb ...
j
COND
COND may be any one of the conditional branches
neq
, nequ
, eql
, eqlu
, gtr
,
geq
, lss
, gtru
, lequ
, vc
, vs
,
gequ
, cc
, lssu
, cs
.
COND may also be one of the bit tests
bs
, bc
, bss
, bcs
, bsc
, bcc
,
bssi
, bcci
, lbs
, lbc
.
NOTCOND is the opposite condition to COND.
(byte displacement)
b
COND
...
jacb
X
X may be one of b d f g h l w
.
(word displacement)
OPCODE
...
OPCODE ..., foo ; brb bar ; foo: jmp ... ; bar:
jaob
YYY
YYY may be one of lss leq
.
jsob
ZZZ
ZZZ may be one of geq gtr
.
(byte displacement)
OPCODE
...
OPCODE ..., foo ; brb bar ; foo: brw destination ; bar:
OPCODE ..., foo ; brb bar ; foo: jmp destination ; bar:
aobleq
aoblss
sobgeq
sobgtr
(byte displacement)
OPCODE
...
OPCODE ..., foo ; brb bar ; foo: brw destination ; bar:
OPCODE ..., foo ; brb bar ; foo: jmp destination ; bar:
The text of the Arduino reference is licensed under a Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain.