The mips configurations of gnu
as
support these
special options:
-G
num
gp
register. It is only accepted for targets
that use ecoff format. The default value is 8.
-EB
-EL
as
can select big-endian or
little-endian output at run time (unlike the other gnu development
tools, which must be configured for one or the other). Use -EB
to select big-endian output, and -EL for little-endian.
-KPIC
Generate SVR4-style PIC. This option tells the assembler to generate
SVR4-style position-independent macro expansions. It also tells the
assembler to mark the output file as PIC.
-mvxworks-pic
Generate VxWorks PIC. This option tells the assembler to generate VxWorks-style position-independent macro expansions.
-mips1
-mips2
-mips3
-mips4
-mips5
-mips32
-mips32r2
-mips64
-mips64r2
-mgp32
-mfp32
The .set gp=32
and .set fp=32
directives allow the size
of registers to be changed for parts of an object. The default value is
restored by .set gp=default
and .set fp=default
.
On some MIPS variants there is a 32-bit mode flag; when this flag is
set, 64-bit instructions generate a trap. Also, some 32-bit OSes only
save the 32-bit registers on a context switch, so it is essential never
to use the 64-bit registers.
-mgp64
-mfp64
The .set gp=64
and .set fp=64
directives allow the size
of registers to be changed for parts of an object. The default value is
restored by .set gp=default
and .set fp=default
.
-mips16
-no-mips16
.set mips16
at the start of the assembly file. -no-mips16
turns off this option.
-msmartmips
-mno-smartmips
.set smartmips
at the start of the assembly file.
-mno-smartmips turns off this option.
-mips3d
-no-mips3d
-mdmx
-no-mdmx
-mdsp
-mno-dsp
-mdspr2
-mno-dspr2
-mmt
-mno-mt
-mfix7000
-mno-fix7000
-mfix-vr4120
-no-mfix-vr4120
-mfix-vr4130
-no-mfix-vr4130
-m4010
-no-m4010
-m4650
-no-m4650
-m3900
-no-m3900
-m4100
-no-m4100
-march=
cpu
2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130, vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000, 10000, 12000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd, m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1, 24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1, 74kf, 74kf1_1, 74kf3_2, 5kc, 5kf, 20kc, 25kf, sb1, sb1a, loongson2e, loongson2f, octeon
For compatibility reasons, n
x and b
fx are
accepted as synonyms for n
f1_1. These values are
deprecated.
-mtune=
cpu
-mabi=
abi
-msym32
-mno-sym32
Equivalent to adding .set sym32
or .set nosym32
to
the beginning of the assembler input. See MIPS symbol sizes.
-nocpp
as
, there is no need for -nocpp, because the
gnu assembler itself never runs the C preprocessor.
-msoft-float
-mhard-float
-msingle-float
-mdouble-float
--construct-floats
--no-construct-floats
--no-construct-floats
option disables the construction of
double width floating point constants by loading the two halves of the
value into the two single width floating point registers that make up
the double width register. This feature is useful if the processor
support the FR bit in its status register, and this bit is known (by
the programmer) to be set. This bit prevents the aliasing of the double
width register by the single width registers.
By default --construct-floats
is selected, allowing construction
of these floating point constants.
--trap
--no-break
as
automatically macro expands certain division and
multiplication instructions to check for overflow and division by zero. This
option causes as
to generate code to take a trap exception
rather than a break exception when an error is detected. The trap instructions
are only supported at Instruction Set Architecture level 2 and higher.
--break
--no-trap
-mpdr
-mno-pdr
.pdr
sections. Off by default on IRIX, on
elsewhere.
-mshared
-mno-shared
The text of the Arduino reference is licensed under a Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain.